1. Field of the Invention
The present invention relates to digital quadrature amplitude modulation, and more specifically, it relates to a digital intermediate frequency (IF) modulator which can be implemented with low cost field programmable gate arrays (FPGAs) to generate very high IF carrier frequencies.
2. Description of Related Art
FIG. 1A depicts a prior art digital Quadrature Amplitude Modulation (QAM) Intermediate Frequency (IF) modulator using a Numerical Control Oscillator (NCO) 1010 and multipliers 1000 and 1030. QAM employs modulation where phase and amplitude are changed according to data input signals. The method is bandwidth efficient but requires high amplitude and phase accuracy. The data input signal is a complex signal that consists of real and imaginary parts. In digital communication, I (In-phase) and Q (Quadrature phase) are used to represent real and imaginary parts. There are M possible symbols, and thus, the technique is normally written as M-QAM. A symbol represents one point in the I/Q constellation. Symbol rate is bit rate divided by log2M.
The 1070 module converts input data from bit rate to symbol rate that is determined by the type of digital M-QAM modulator selected. The serial data are digital in strict sense, and are coming from any digital device at 1 bit per clock cycle. The grouping of the serial bits into k-bits follows the equality k=log2M, where M is the M-QAM modulation scheme. Each group of k-bits are then fed in parallel to the 1060, where the k-bits are mapped into I-bits and Q-bits parallel data. The numbers of I-bits and Q-bits are mapped according to the selected M-QAM constellation. For a square constellation, the numbers of I-bits and Q-bits=k-bits/2. The value of the I-bits and Q-bits represented is determined by the type of mapping used. For instance, GRAY coding requires that I and Q have values that are different by no more than one logical position. 1080 and 1100 performs the pulse shaping on the I-bits and Q-bits of data to remove the intersymbol interference (ISI), as well as reducing the radio bandwidth. The 1090 and 1200 adds more zero data samples to the output of the 1080 and 1100 to match the speed of the 1012 and 1013 prior to digitally multiplying the digital samples at 1000 and 1030. And the results are added digitally at a 1020 to produce the digital modulated carrier. The operation is done at DAC's speed, which is lots higher than the symbol rate, typically, the DAC's speed is more than 10 times that of the symbol rate. The 1020 digital data samples are converted to analog waveform via DAC. This is the Intermediate Frequency (IF) since it is sent further down the chain to the RFE (Radio Front End) for amplification, filtering, and final carrier upconversion prior to transmission.
FIG. 1B is a prior art block diagram illustrating how the sine IF frequency is generated by the NCO. The sine carrier frequency, of Phase accumulator 1011 is generated by successively adding the phase M-word loaded into the parallel phase register until the phase accumulator is overflowed, which is then addressed to the sine ROM 1013. The digital sine and cosine output is then sequentially multiplied to the digitally filtered I and Q after band-limiting and interpolation to the matched fc, which is the sampling frequency of the Digital to Analog converter (D/A).
Referring again to FIG. 1A, the digital output of the NCO at 1020 is S(n)=Ai(n)Cos(ωift(n))+Aq(n)Sin(ωift(n)), where ωif is the output frequency of the NCO and Ai(n) and Aq(n) are the quadrature data symbols.
A drawback from the use of an NCO is that the Digital IF QAM Modulator requires two multipliers 1000 and 1030, which results in inefficient field programmable gate array (FPGA) implementation. FPGA is a generic terminology for programmable logic device, all digital design are realizable using FPGA, or ASIC.
Additionally, 1012 and 1013 require large ROMs in order to achieve acceptable spectral purity. The size of ROM is (2k×M), where k is the truncated phase address, which is normally 14 bits or above, and M is the bus width of the ROM (typically determined by the DAC resolution, e.g., 8-bit to 12-bits, without compression). Furthermore, the sequential operation of the NCO, multiplier, and adder logic demands that the digital operation speed be the same as that of fc (sampling frequency). As a result for higher fo frequency, an increase in power and cost will result fo is an output frequency generated after the digital data are fed through the DAC (digital to Analog Converter). The Nyquist requirement dictates that the fc greater or equal to 2fo frequency.
FIG. 2 depicts a Coordinate Rotation Digital Computer (CORDIC)-based digital QAM modulator. CORDIC 1100 implements the same functions as the cosine and sine ROMs of FIG. 1A, using arrays of adders and subtractors. The goal is to remove the multipliers and sine/cosine ROMs, which cannot be realized efficiently using FPGAs or Application Specific Integrated Circuits (ASICs). According to WO 00/65799, the CORDIC circular rotator performs small successive rotations to achieve the phase to amplitude conversion without the use of Sine and Cosine ROMs.
A drawback of the CORDIC-based digital QAM IF is that its modulator phase accumulator operates at the same speeds as the D/A, and thus demands more power, which translates directly to high cost and more spectrum noise. For upsampling, the D/A sampling speed is at least 3 times the phase accumulator speed. For an 80 MHz IF modulator carrier, this requires a FPGA normal operating speed of 240 MHz for the CORDIC and phase accumulator logic. It is realizable but expensive for this kind of FPGA speed.
Wireless and wire communication systems using digital QAM IF modulation have been limited to ASIC due to the lack of a simple algorithm to implement a high speed, low cost and low power digital QAM IF modulator. It is therefore desirable to provide a digital QAM IF modulator that can be implemented very efficiently using the basic logic structure of a FPGA, such as adders, multiplexers and ROM Look-up-tables (LUTs). The present invention provides such a device